Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 | /* SPDX-License-Identifier: GPL-2.0-only */ #ifndef _ASM_X86_XOR_AVX_H #define _ASM_X86_XOR_AVX_H /* * Optimized RAID-5 checksumming functions for AVX * * Copyright (C) 2012 Intel Corporation * Author: Jim Kukunas <james.t.kukunas@linux.intel.com> * * Based on Ingo Molnar and Zach Brown's respective MMX and SSE routines */ #ifdef CONFIG_AS_AVX #include <linux/compiler.h> #include <asm/fpu/api.h> #define BLOCK4(i) \ BLOCK(32 * i, 0) \ BLOCK(32 * (i + 1), 1) \ BLOCK(32 * (i + 2), 2) \ BLOCK(32 * (i + 3), 3) #define BLOCK16() \ BLOCK4(0) \ BLOCK4(4) \ BLOCK4(8) \ BLOCK4(12) static void xor_avx_2(unsigned long bytes, unsigned long *p0, unsigned long *p1) { unsigned long lines = bytes >> 9; kernel_fpu_begin(); while (lines--) { #undef BLOCK #define BLOCK(i, reg) \ do { \ asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p1[i / sizeof(*p1)])); \ asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \ "m" (p0[i / sizeof(*p0)])); \ asm volatile("vmovdqa %%ymm" #reg ", %0" : \ "=m" (p0[i / sizeof(*p0)])); \ } while (0); BLOCK16() p0 = (unsigned long *)((uintptr_t)p0 + 512); p1 = (unsigned long *)((uintptr_t)p1 + 512); } kernel_fpu_end(); } static void xor_avx_3(unsigned long bytes, unsigned long *p0, unsigned long *p1, unsigned long *p2) { unsigned long lines = bytes >> 9; kernel_fpu_begin(); while (lines--) { #undef BLOCK #define BLOCK(i, reg) \ do { \ asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p2[i / sizeof(*p2)])); \ asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \ "m" (p1[i / sizeof(*p1)])); \ asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \ "m" (p0[i / sizeof(*p0)])); \ asm volatile("vmovdqa %%ymm" #reg ", %0" : \ "=m" (p0[i / sizeof(*p0)])); \ } while (0); BLOCK16() p0 = (unsigned long *)((uintptr_t)p0 + 512); p1 = (unsigned long *)((uintptr_t)p1 + 512); p2 = (unsigned long *)((uintptr_t)p2 + 512); } kernel_fpu_end(); } static void xor_avx_4(unsigned long bytes, unsigned long *p0, unsigned long *p1, unsigned long *p2, unsigned long *p3) { unsigned long lines = bytes >> 9; kernel_fpu_begin(); while (lines--) { #undef BLOCK #define BLOCK(i, reg) \ do { \ asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p3[i / sizeof(*p3)])); \ asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \ "m" (p2[i / sizeof(*p2)])); \ asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \ "m" (p1[i / sizeof(*p1)])); \ asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \ "m" (p0[i / sizeof(*p0)])); \ asm volatile("vmovdqa %%ymm" #reg ", %0" : \ "=m" (p0[i / sizeof(*p0)])); \ } while (0); BLOCK16(); p0 = (unsigned long *)((uintptr_t)p0 + 512); p1 = (unsigned long *)((uintptr_t)p1 + 512); p2 = (unsigned long *)((uintptr_t)p2 + 512); p3 = (unsigned long *)((uintptr_t)p3 + 512); } kernel_fpu_end(); } static void xor_avx_5(unsigned long bytes, unsigned long *p0, unsigned long *p1, unsigned long *p2, unsigned long *p3, unsigned long *p4) { unsigned long lines = bytes >> 9; kernel_fpu_begin(); while (lines--) { #undef BLOCK #define BLOCK(i, reg) \ do { \ asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p4[i / sizeof(*p4)])); \ asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \ "m" (p3[i / sizeof(*p3)])); \ asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \ "m" (p2[i / sizeof(*p2)])); \ asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \ "m" (p1[i / sizeof(*p1)])); \ asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \ "m" (p0[i / sizeof(*p0)])); \ asm volatile("vmovdqa %%ymm" #reg ", %0" : \ "=m" (p0[i / sizeof(*p0)])); \ } while (0); BLOCK16() p0 = (unsigned long *)((uintptr_t)p0 + 512); p1 = (unsigned long *)((uintptr_t)p1 + 512); p2 = (unsigned long *)((uintptr_t)p2 + 512); p3 = (unsigned long *)((uintptr_t)p3 + 512); p4 = (unsigned long *)((uintptr_t)p4 + 512); } kernel_fpu_end(); } static struct xor_block_template xor_block_avx = { .name = "avx", .do_2 = xor_avx_2, .do_3 = xor_avx_3, .do_4 = xor_avx_4, .do_5 = xor_avx_5, }; #define AVX_XOR_SPEED \ do { \ if (boot_cpu_has(X86_FEATURE_AVX) && boot_cpu_has(X86_FEATURE_OSXSAVE)) \ xor_speed(&xor_block_avx); \ } while (0) #define AVX_SELECT(FASTEST) \ (boot_cpu_has(X86_FEATURE_AVX) && boot_cpu_has(X86_FEATURE_OSXSAVE) ? &xor_block_avx : FASTEST) #else #define AVX_XOR_SPEED {} #define AVX_SELECT(FASTEST) (FASTEST) #endif #endif |