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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 | /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> */ #ifndef _ASM_POWERPC_HW_IRQ_H #define _ASM_POWERPC_HW_IRQ_H #ifdef __KERNEL__ #include <linux/errno.h> #include <linux/compiler.h> #include <asm/ptrace.h> #include <asm/processor.h> #ifdef CONFIG_PPC64 /* * PACA flags in paca->irq_happened. * * This bits are set when interrupts occur while soft-disabled * and allow a proper replay. Additionally, PACA_IRQ_HARD_DIS * is set whenever we manually hard disable. */ #define PACA_IRQ_HARD_DIS 0x01 #define PACA_IRQ_DBELL 0x02 #define PACA_IRQ_EE 0x04 #define PACA_IRQ_DEC 0x08 /* Or FIT */ #define PACA_IRQ_EE_EDGE 0x10 /* BookE only */ #define PACA_IRQ_HMI 0x20 #define PACA_IRQ_PMI 0x40 /* * Some soft-masked interrupts must be hard masked until they are replayed * (e.g., because the soft-masked handler does not clear the exception). */ #ifdef CONFIG_PPC_BOOK3S #define PACA_IRQ_MUST_HARD_MASK (PACA_IRQ_EE|PACA_IRQ_PMI) #else #define PACA_IRQ_MUST_HARD_MASK (PACA_IRQ_EE) #endif /* * flags for paca->irq_soft_mask */ #define IRQS_ENABLED 0 #define IRQS_DISABLED 1 /* local_irq_disable() interrupts */ #define IRQS_PMI_DISABLED 2 #define IRQS_ALL_DISABLED (IRQS_DISABLED | IRQS_PMI_DISABLED) #endif /* CONFIG_PPC64 */ #ifndef __ASSEMBLY__ extern void replay_system_reset(void); extern void __replay_interrupt(unsigned int vector); extern void timer_interrupt(struct pt_regs *); extern void timer_broadcast_interrupt(void); extern void performance_monitor_exception(struct pt_regs *regs); extern void WatchdogException(struct pt_regs *regs); extern void unknown_exception(struct pt_regs *regs); #ifdef CONFIG_PPC64 #include <asm/paca.h> static inline notrace unsigned long irq_soft_mask_return(void) { unsigned long flags; asm volatile( "lbz %0,%1(13)" : "=r" (flags) : "i" (offsetof(struct paca_struct, irq_soft_mask))); return flags; } /* * The "memory" clobber acts as both a compiler barrier * for the critical section and as a clobber because * we changed paca->irq_soft_mask */ static inline notrace void irq_soft_mask_set(unsigned long mask) { #ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG /* * The irq mask must always include the STD bit if any are set. * * and interrupts don't get replayed until the standard * interrupt (local_irq_disable()) is unmasked. * * Other masks must only provide additional masking beyond * the standard, and they are also not replayed until the * standard interrupt becomes unmasked. * * This could be changed, but it will require partial * unmasks to be replayed, among other things. For now, take * the simple approach. */ WARN_ON(mask && !(mask & IRQS_DISABLED)); #endif asm volatile( "stb %0,%1(13)" : : "r" (mask), "i" (offsetof(struct paca_struct, irq_soft_mask)) : "memory"); } static inline notrace unsigned long irq_soft_mask_set_return(unsigned long mask) { unsigned long flags; #ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG WARN_ON(mask && !(mask & IRQS_DISABLED)); #endif asm volatile( "lbz %0,%1(13); stb %2,%1(13)" : "=&r" (flags) : "i" (offsetof(struct paca_struct, irq_soft_mask)), "r" (mask) : "memory"); return flags; } static inline notrace unsigned long irq_soft_mask_or_return(unsigned long mask) { unsigned long flags, tmp; asm volatile( "lbz %0,%2(13); or %1,%0,%3; stb %1,%2(13)" : "=&r" (flags), "=r" (tmp) : "i" (offsetof(struct paca_struct, irq_soft_mask)), "r" (mask) : "memory"); #ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG WARN_ON((mask | flags) && !((mask | flags) & IRQS_DISABLED)); #endif return flags; } static inline unsigned long arch_local_save_flags(void) { return irq_soft_mask_return(); } static inline void arch_local_irq_disable(void) { irq_soft_mask_set(IRQS_DISABLED); } extern void arch_local_irq_restore(unsigned long); static inline void arch_local_irq_enable(void) { arch_local_irq_restore(IRQS_ENABLED); } static inline unsigned long arch_local_irq_save(void) { return irq_soft_mask_set_return(IRQS_DISABLED); } static inline bool arch_irqs_disabled_flags(unsigned long flags) { return flags & IRQS_DISABLED; } static inline bool arch_irqs_disabled(void) { return arch_irqs_disabled_flags(arch_local_save_flags()); } #ifdef CONFIG_PPC_BOOK3S /* * To support disabling and enabling of irq with PMI, set of * new powerpc_local_irq_pmu_save() and powerpc_local_irq_restore() * functions are added. These macros are implemented using generic * linux local_irq_* code from include/linux/irqflags.h. */ #define raw_local_irq_pmu_save(flags) \ do { \ typecheck(unsigned long, flags); \ flags = irq_soft_mask_or_return(IRQS_DISABLED | \ IRQS_PMI_DISABLED); \ } while(0) #define raw_local_irq_pmu_restore(flags) \ do { \ typecheck(unsigned long, flags); \ arch_local_irq_restore(flags); \ } while(0) #ifdef CONFIG_TRACE_IRQFLAGS #define powerpc_local_irq_pmu_save(flags) \ do { \ raw_local_irq_pmu_save(flags); \ trace_hardirqs_off(); \ } while(0) #define powerpc_local_irq_pmu_restore(flags) \ do { \ if (raw_irqs_disabled_flags(flags)) { \ raw_local_irq_pmu_restore(flags); \ trace_hardirqs_off(); \ } else { \ trace_hardirqs_on(); \ raw_local_irq_pmu_restore(flags); \ } \ } while(0) #else #define powerpc_local_irq_pmu_save(flags) \ do { \ raw_local_irq_pmu_save(flags); \ } while(0) #define powerpc_local_irq_pmu_restore(flags) \ do { \ raw_local_irq_pmu_restore(flags); \ } while (0) #endif /* CONFIG_TRACE_IRQFLAGS */ #endif /* CONFIG_PPC_BOOK3S */ #ifdef CONFIG_PPC_BOOK3E #define __hard_irq_enable() wrtee(MSR_EE) #define __hard_irq_disable() wrtee(0) #else #define __hard_irq_enable() __mtmsrd(MSR_EE|MSR_RI, 1) #define __hard_irq_disable() __mtmsrd(MSR_RI, 1) #endif #define hard_irq_disable() do { \ unsigned long flags; \ __hard_irq_disable(); \ flags = irq_soft_mask_set_return(IRQS_ALL_DISABLED); \ local_paca->irq_happened |= PACA_IRQ_HARD_DIS; \ if (!arch_irqs_disabled_flags(flags)) { \ asm ("stdx %%r1, 0, %1 ;" \ : "=m" (local_paca->saved_r1) \ : "b" (&local_paca->saved_r1)); \ trace_hardirqs_off(); \ } \ } while(0) static inline bool lazy_irq_pending(void) { return !!(get_paca()->irq_happened & ~PACA_IRQ_HARD_DIS); } /* * This is called by asynchronous interrupts to conditionally * re-enable hard interrupts after having cleared the source * of the interrupt. They are kept disabled if there is a different * soft-masked interrupt pending that requires hard masking. */ static inline void may_hard_irq_enable(void) { if (!(get_paca()->irq_happened & PACA_IRQ_MUST_HARD_MASK)) { get_paca()->irq_happened &= ~PACA_IRQ_HARD_DIS; __hard_irq_enable(); } } static inline bool arch_irq_disabled_regs(struct pt_regs *regs) { return (regs->softe & IRQS_DISABLED); } extern bool prep_irq_for_idle(void); extern bool prep_irq_for_idle_irqsoff(void); extern void irq_set_pending_from_srr1(unsigned long srr1); #define fini_irq_for_idle_irqsoff() trace_hardirqs_off(); extern void force_external_irq_replay(void); #else /* CONFIG_PPC64 */ static inline unsigned long arch_local_save_flags(void) { return mfmsr(); } static inline void arch_local_irq_restore(unsigned long flags) { if (IS_ENABLED(CONFIG_BOOKE)) wrtee(flags); else mtmsr(flags); } static inline unsigned long arch_local_irq_save(void) { unsigned long flags = arch_local_save_flags(); if (IS_ENABLED(CONFIG_BOOKE)) wrtee(0); else if (IS_ENABLED(CONFIG_PPC_8xx)) wrtspr(SPRN_EID); else mtmsr(flags & ~MSR_EE); return flags; } static inline void arch_local_irq_disable(void) { if (IS_ENABLED(CONFIG_BOOKE)) wrtee(0); else if (IS_ENABLED(CONFIG_PPC_8xx)) wrtspr(SPRN_EID); else mtmsr(mfmsr() & ~MSR_EE); } static inline void arch_local_irq_enable(void) { if (IS_ENABLED(CONFIG_BOOKE)) wrtee(MSR_EE); else if (IS_ENABLED(CONFIG_PPC_8xx)) wrtspr(SPRN_EIE); else mtmsr(mfmsr() | MSR_EE); } static inline bool arch_irqs_disabled_flags(unsigned long flags) { return (flags & MSR_EE) == 0; } static inline bool arch_irqs_disabled(void) { return arch_irqs_disabled_flags(arch_local_save_flags()); } #define hard_irq_disable() arch_local_irq_disable() static inline bool arch_irq_disabled_regs(struct pt_regs *regs) { return !(regs->msr & MSR_EE); } static inline void may_hard_irq_enable(void) { } #endif /* CONFIG_PPC64 */ #define ARCH_IRQ_INIT_FLAGS IRQ_NOREQUEST /* * interrupt-retrigger: should we handle this via lost interrupts and IPIs * or should we not care like we do now ? --BenH. */ struct irq_chip; #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_HW_IRQ_H */ |