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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 | /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle * Copyright (C) 1996 by Paul M. Antoine * Copyright (C) 1999 Silicon Graphics * Copyright (C) 2000 MIPS Technologies, Inc. */ #include <asm/irqflags.h> #include <asm/hazards.h> #include <linux/compiler.h> #include <linux/preempt.h> #include <linux/export.h> #include <linux/stringify.h> #if !defined(CONFIG_CPU_HAS_DIEI) /* * For cli() we have to insert nops to make sure that the new value * has actually arrived in the status register before the end of this * macro. * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs * no nops at all. */ /* * For TX49, operating only IE bit is not enough. * * If mfc0 $12 follows store and the mfc0 is last instruction of a * page and fetching the next instruction causes TLB miss, the result * of the mfc0 might wrongly contain EXL bit. * * ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008 * * Workaround: mask EXL bit of the result or place a nop before mfc0. */ notrace void arch_local_irq_disable(void) { preempt_disable(); __asm__ __volatile__( " .set push \n" " .set noat \n" " mfc0 $1,$12 \n" " ori $1,0x1f \n" " xori $1,0x1f \n" " .set noreorder \n" " mtc0 $1,$12 \n" " " __stringify(__irq_disable_hazard) " \n" " .set pop \n" : /* no outputs */ : /* no inputs */ : "memory"); preempt_enable(); } EXPORT_SYMBOL(arch_local_irq_disable); notrace unsigned long arch_local_irq_save(void) { unsigned long flags; preempt_disable(); __asm__ __volatile__( " .set push \n" " .set reorder \n" " .set noat \n" " mfc0 %[flags], $12 \n" " ori $1, %[flags], 0x1f \n" " xori $1, 0x1f \n" " .set noreorder \n" " mtc0 $1, $12 \n" " " __stringify(__irq_disable_hazard) " \n" " .set pop \n" : [flags] "=r" (flags) : /* no inputs */ : "memory"); preempt_enable(); return flags; } EXPORT_SYMBOL(arch_local_irq_save); notrace void arch_local_irq_restore(unsigned long flags) { unsigned long __tmp1; preempt_disable(); __asm__ __volatile__( " .set push \n" " .set noreorder \n" " .set noat \n" " mfc0 $1, $12 \n" " andi %[flags], 1 \n" " ori $1, 0x1f \n" " xori $1, 0x1f \n" " or %[flags], $1 \n" " mtc0 %[flags], $12 \n" " " __stringify(__irq_disable_hazard) " \n" " .set pop \n" : [flags] "=r" (__tmp1) : "0" (flags) : "memory"); preempt_enable(); } EXPORT_SYMBOL(arch_local_irq_restore); #endif /* !CONFIG_CPU_HAS_DIEI */ |